The present invention relates to integrated chip capacitors, and more specifically, to capacitors using carbon nanotubes.
Integrated chips generally include on-chip decoupling capacitors to suppress voltage spikes and other electrical disturbances from destroying the operative elements of the integrated chip. On-chip decoupling capacitors generally include a first electrode and a second electrode having a dielectric material formed in between. The capacitance is generally affected by the materials used, the surface area between the first electrode and second electrode and the distance between the electrodes. A common method of increasing capacitance includes increasing the surface area between the electrodes. In one method, a trench may be formed in the first electrode and the second electrode is formed into a prong that extends into the trench. Also, several of these trench/prong architectures may be linked to extend the surface area between the first and second electrodes.